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@ -86,10 +86,10 @@ var ( |
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"BPUReadHit": perf.BPUReadHitProfiler, |
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"BPUReadMiss": perf.BPUReadMissProfiler, |
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// "L1InstrReadHit": perf.L1InstrReadHitProfiler,
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// "DataTLBReadHit": perf.DataTLBReadHitProfiler,
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// "DataTLBReadMiss": perf.DataTLBReadMissProfiler,
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// "DataTLBWriteHit": perf.DataTLBWriteHitProfiler,
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// "DataTLBWriteMiss": perf.DataTLBWriteMissProfiler,
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"DataTLBReadHit": perf.DataTLBReadHitProfiler, |
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"DataTLBReadMiss": perf.DataTLBReadMissProfiler, |
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"DataTLBWriteHit": perf.DataTLBWriteHitProfiler, |
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"DataTLBWriteMiss": perf.DataTLBWriteMissProfiler, |
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// "NodeCacheReadHit": perf.NodeCacheReadHitProfiler,
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// "NodeCacheReadMiss": perf.NodeCacheReadMissProfiler,
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// "NodeCacheWriteHit": perf.NodeCacheWriteHitProfiler,
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@ -355,7 +355,7 @@ func NewPerfCollector(logger *slog.Logger) (Collector, error) { |
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} |
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} |
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} |
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cacheProfilers := perf.L1DataReadHitProfiler | perf.L1DataReadMissProfiler | perf.L1DataWriteHitProfiler | perf.L1InstrReadMissProfiler | perf.InstrTLBReadHitProfiler | perf.InstrTLBReadMissProfiler | perf.LLReadHitProfiler | perf.LLReadMissProfiler | perf.LLWriteHitProfiler | perf.LLWriteMissProfiler | perf.BPUReadHitProfiler | perf.BPUReadMissProfiler |
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cacheProfilers := perf.L1DataReadHitProfiler | perf.L1DataReadMissProfiler | perf.L1DataWriteHitProfiler | perf.L1InstrReadMissProfiler | perf.InstrTLBReadHitProfiler | perf.InstrTLBReadMissProfiler | perf.DataTLBReadHitProfiler | perf.DataTLBReadMissProfiler | perf.DataTLBWriteHitProfiler | perf.DataTLBWriteMissProfiler | perf.LLReadHitProfiler | perf.LLReadMissProfiler | perf.LLWriteHitProfiler | perf.LLWriteMissProfiler | perf.BPUReadHitProfiler | perf.BPUReadMissProfiler |
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if *perfCaProfilerFlag != nil && len(*perfCaProfilerFlag) > 0 { |
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cacheProfilers = 0 |
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for _, cf := range *perfCaProfilerFlag { |
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@ -615,6 +615,46 @@ func NewPerfCollector(logger *slog.Logger) (Collector, error) { |
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[]string{"cpu"}, |
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nil, |
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), |
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"cache_tlb_data_read_hits_total": prometheus.NewDesc( |
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prometheus.BuildFQName( |
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namespace, |
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perfSubsystem, |
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"cache_tlb_data_read_hits_total", |
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), |
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"Number of data TLB read hits", |
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[]string{"cpu"}, |
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nil, |
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), |
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"cache_tlb_data_read_misses_total": prometheus.NewDesc( |
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prometheus.BuildFQName( |
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namespace, |
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perfSubsystem, |
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"cache_tlb_data_read_misses_total", |
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), |
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"Number of data TLB read misses", |
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[]string{"cpu"}, |
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nil, |
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), |
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"cache_tlb_data_write_hits_total": prometheus.NewDesc( |
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prometheus.BuildFQName( |
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namespace, |
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perfSubsystem, |
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"cache_tlb_data_write_hits_total", |
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), |
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"Number of data TLB write hits", |
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[]string{"cpu"}, |
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nil, |
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), |
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"cache_tlb_data_write_misses_total": prometheus.NewDesc( |
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prometheus.BuildFQName( |
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namespace, |
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perfSubsystem, |
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"cache_tlb_data_write_misses_total", |
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), |
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"Number of data TLB write misses", |
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[]string{"cpu"}, |
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nil, |
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), |
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"cache_ll_read_hits_total": prometheus.NewDesc( |
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prometheus.BuildFQName( |
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namespace, |
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@ -895,6 +935,38 @@ func (c *perfCollector) updateCacheStats(ch chan<- prometheus.Metric) error { |
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) |
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} |
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if cacheProfile.DataTLBReadHit != nil { |
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ch <- prometheus.MustNewConstMetric( |
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c.desc["cache_tlb_data_read_hits_total"], |
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prometheus.CounterValue, float64(*cacheProfile.DataTLBReadHit), |
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cpuid, |
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) |
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} |
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if cacheProfile.DataTLBReadMiss != nil { |
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ch <- prometheus.MustNewConstMetric( |
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c.desc["cache_tlb_data_read_misses_total"], |
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prometheus.CounterValue, float64(*cacheProfile.DataTLBReadMiss), |
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cpuid, |
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) |
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} |
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if cacheProfile.DataTLBWriteHit != nil { |
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ch <- prometheus.MustNewConstMetric( |
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c.desc["cache_tlb_data_write_hits_total"], |
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prometheus.CounterValue, float64(*cacheProfile.DataTLBWriteHit), |
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cpuid, |
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) |
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} |
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if cacheProfile.DataTLBWriteMiss != nil { |
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ch <- prometheus.MustNewConstMetric( |
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c.desc["cache_tlb_data_write_misses_total"], |
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prometheus.CounterValue, float64(*cacheProfile.DataTLBWriteMiss), |
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cpuid, |
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) |
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} |
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if cacheProfile.LastLevelReadHit != nil { |
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ch <- prometheus.MustNewConstMetric( |
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c.desc["cache_ll_read_hits_total"], |
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