mirror of https://github.com/Cisco-Talos/clamav
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/*
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* Copyright (C) 2008 Sourcefire, Inc. |
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* |
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* Authors: aCaB <acab@clamav.net> |
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* |
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* This program is free software; you can redistribute it and/or modify |
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* it under the terms of the GNU General Public License version 2 as |
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* published by the Free Software Foundation. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, |
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* MA 02110-1301, USA. |
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*/ |
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#ifndef __DISASM_H |
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#define __DISASM_H |
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#if HAVE_CONFIG_H |
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#include "clamav-config.h" |
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#endif |
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#include "others.h" |
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void disasmbuf(uint8_t *, unsigned int, int); |
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#endif |
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@ -0,0 +1,404 @@ |
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/*
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* Copyright (C) 2008 Sourcefire, Inc. |
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* |
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* Authors: aCaB <acab@clamav.net> |
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* |
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* This program is free software; you can redistribute it and/or modify |
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* it under the terms of the GNU General Public License version 2 as |
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* published by the Free Software Foundation. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, |
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* MA 02110-1301, USA. |
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*/ |
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#ifndef __DISASMPRIV_H |
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#define __DISASMPRIV_H |
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#if HAVE_CONFIG_H |
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#include "clamav-config.h" |
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#endif |
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#include <stdio.h> |
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#include <string.h> |
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#include <assert.h> |
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#include "others.h" |
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enum X86OPS { |
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OP_INVALID, |
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OP_AAA, |
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OP_AAD, |
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OP_AAM, |
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OP_AAS, |
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OP_ADD, |
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OP_ADC, |
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OP_AND, |
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OP_ARPL, |
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OP_BOUND, |
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OP_BSF, |
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OP_BSR, |
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OP_BSWAP, |
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OP_BT, |
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OP_BTC, |
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OP_BTR, |
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OP_BTS, |
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OP_CALL, |
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OP_CDQ, |
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OP_CWD, |
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OP_CWDE, |
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OP_CBW, |
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OP_CLC, |
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OP_CLD, |
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OP_CLI, |
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OP_CLTS, |
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OP_CMC, |
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OP_CMOVO, |
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OP_CMOVNO, |
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OP_CMOVC, |
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OP_CMOVNC, |
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OP_CMOVZ, |
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OP_CMOVNZ, |
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OP_CMOVBE, |
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OP_CMOVA, |
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OP_CMOVS, |
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OP_CMOVNS, |
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OP_CMOVP, |
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OP_CMOVNP, |
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OP_CMOVL, |
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OP_CMOVGE, |
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OP_CMOVLE, |
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OP_CMOVG, |
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OP_CMP, |
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OP_CMPSD, |
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OP_CMPSW, |
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OP_CMPSB, |
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OP_CMPXCHG, |
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OP_CMPXCHG8B, |
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OP_CPUID, |
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OP_DAA, |
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OP_DAS, |
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OP_DEC, |
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OP_DIV, |
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OP_ENTER, |
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OP_FWAIT, |
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OP_HLT, |
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OP_IDIV, |
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OP_IMUL, |
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OP_INC, |
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OP_IN, |
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OP_INSD, |
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OP_INSW, |
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OP_INSB, |
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OP_INT, |
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OP_INT3, |
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OP_INTO, |
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OP_INVD, |
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OP_INVLPG, |
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OP_IRET, |
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OP_JO, |
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OP_JNO, |
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OP_JC, |
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OP_JNC, |
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OP_JZ, |
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OP_JNZ, |
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OP_JBE, |
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OP_JA, |
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OP_JS, |
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OP_JNS, |
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OP_JP, |
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OP_JNP, |
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OP_JL, |
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OP_JGE, |
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OP_JLE, |
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OP_JG, |
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OP_JMP, |
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OP_LAHF, |
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OP_LAR, |
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OP_LDS, |
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OP_LES, |
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OP_LFS, |
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OP_LGS, |
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OP_LEA, |
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OP_LEAVE, |
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OP_LGDT, |
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OP_LIDT, |
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OP_LLDT, |
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OP_PREFIX_LOCK, |
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OP_LODSD, |
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OP_LODSW, |
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OP_LODSB, |
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OP_LOOP, |
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OP_LOOPE, |
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OP_LOOPNE, |
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OP_LSL, |
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OP_LSS, |
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OP_LTR, |
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OP_MOV, |
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OP_MOVSD, |
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OP_MOVSW, |
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OP_MOVSB, |
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OP_MOVSX, |
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OP_MOVZX, |
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OP_MUL, |
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OP_NEG, |
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OP_NOP, |
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OP_NOT, |
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OP_OR, |
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OP_OUT, |
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OP_OUTSD, |
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OP_OUTSW, |
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OP_OUTSB, |
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OP_PUSH, |
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OP_PUSHAD, |
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OP_PUSHA, |
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OP_PUSHFD, |
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OP_PUSHF, |
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OP_POP, |
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OP_POPAD, |
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OP_POPFD, |
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OP_POPF, |
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OP_RCL, |
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OP_RCR, |
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OP_RDMSR, |
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OP_RDPMC, |
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OP_RDTSC, |
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OP_PREFIX_REPE, |
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OP_PREFIX_REPNE, |
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OP_RETF, |
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OP_RETN, |
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OP_ROL, |
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OP_ROR, |
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OP_RSM, |
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OP_SAHF, |
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OP_SAR, |
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OP_SBB, |
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OP_SCASD, |
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OP_SCASW, |
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OP_SCASB, |
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OP_SETO, |
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OP_SETNO, |
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OP_SETC, |
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OP_SETNC, |
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OP_SETZ, |
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OP_SETNZ, |
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OP_SETBE, |
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OP_SETA, |
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OP_SETS, |
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OP_SETNS, |
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OP_SETP, |
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OP_SETNP, |
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OP_SETL, |
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OP_SETGE, |
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OP_SETLE, |
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OP_SETG, |
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OP_SGDT, |
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OP_SIDT, |
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OP_SHL, |
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OP_SHLD, |
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OP_SHR, |
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OP_SHRD, |
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OP_SLDT, |
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OP_STOSD, |
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OP_STOSW, |
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OP_STOSB, |
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OP_STR, |
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OP_STC, |
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OP_STD, |
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OP_STI, |
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OP_SUB, |
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OP_SYSCALL, |
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OP_SYSENTER, |
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OP_SYSEXIT, |
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OP_SYSRET, |
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OP_TEST, |
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OP_UD2, |
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OP_VERR, |
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OP_VERRW, |
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OP_WBINVD, |
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OP_WRMSR, |
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OP_XADD, |
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OP_XCHG, |
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OP_XLAT, |
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OP_XOR, |
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OP_PREFIX_OPSIZE, |
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OP_PREFIX_ADDRSIZE, |
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OP_PREFIX_SEGMENT, |
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OP_2BYTE, |
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OP_FPU, |
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OP_F2XM1, |
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OP_FABS, |
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OP_FADD, |
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OP_FADDP, |
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OP_FBLD, |
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OP_FBSTP, |
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OP_FCHS, |
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OP_FCLEX, |
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OP_FCMOVB, |
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OP_FCMOVBE, |
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OP_FCMOVE, |
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OP_FCMOVNB, |
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OP_FCMOVNBE, |
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OP_FCMOVNE, |
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OP_FCMOVNU, |
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OP_FCMOVU, |
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OP_FCOM, |
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OP_FCOMI, |
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OP_FCOMIP, |
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OP_FCOMP, |
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OP_FCOMPP, |
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OP_FCOS, |
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OP_FDECSTP, |
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OP_FDIV, |
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OP_FDIVP, |
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OP_FDIVR, |
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OP_FDIVRP, |
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OP_FFREE, |
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OP_FIADD, |
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OP_FICOM, |
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OP_FICOMP, |
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OP_FIDIV, |
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OP_FIDIVR, |
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OP_FILD, |
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OP_FIMUL, |
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OP_FINCSTP, |
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OP_FINIT, |
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OP_FIST, |
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OP_FISTP, |
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OP_FISTTP, |
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OP_FISUB, |
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OP_FISUBR, |
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OP_FLD, |
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OP_FLD1, |
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OP_FLDCW, |
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OP_FLDENV, |
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OP_FLDL2E, |
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OP_FLDL2T, |
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OP_FLDLG2, |
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OP_FLDLN2, |
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OP_FLDPI, |
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OP_FLDZ, |
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OP_FMUL, |
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OP_FMULP, |
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OP_FNOP, |
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OP_FPATAN, |
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OP_FPREM, |
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OP_FPREM1, |
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OP_FPTAN, |
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OP_FRNDINT, |
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OP_FRSTOR, |
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OP_FSCALE, |
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OP_FSIN, |
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OP_FSINCOS, |
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OP_FSQRT, |
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OP_FSAVE, |
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OP_FST, |
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OP_FSTCW, |
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OP_FSTENV, |
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OP_FSTP, |
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OP_FSTSW, |
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OP_FSUB, |
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OP_FSUBP, |
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OP_FSUBR, |
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OP_FSUBRP, |
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OP_FTST, |
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OP_FUCOM, |
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OP_FUCOMI, |
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OP_FUCOMIP, |
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OP_FUCOMP, |
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OP_FUCOMPP, |
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OP_FXAM, |
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OP_FXCH, |
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OP_FXTRACT, |
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OP_FYL2X, |
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OP_FYL2XP1 |
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}; |
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enum DIS_STATE { |
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STATE_GETOP, |
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STATE_CHECKDTYPE, |
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STATE_CHECKSTYPE, |
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STATE_DECODEX87, |
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STATE_FINALIZE, |
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STATE_COMPLETE, |
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STATE_ERROR |
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}; |
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enum DIS_ACCESS { |
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ACCESS_NOARG, /* arg not present */ |
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ACCESS_IMM, /* immediate */ |
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ACCESS_REL, /* +/- immediate */ |
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ACCESS_REG, /* register */ |
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ACCESS_MEM /* [something] */ |
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}; |
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enum DIS_SIZE { /* for mem access, immediate and relative */ |
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SIZEB, |
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SIZEW, |
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SIZED, |
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SIZEF, |
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SIZEQ, |
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SIZET, |
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SIZEPTR |
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}; |
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enum X86REGS { |
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REG_EAX, REG_ECX, REG_EDX, REG_EBX, REG_ESP, REG_EBP, REG_ESI, REG_EDI, |
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REG_AX, REG_CX, REG_DX, REG_BX, REG_SP, REG_BP, REG_SI, REG_DI, |
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REG_AH, REG_CH, REG_DH, REG_BH, REG_AL, REG_CL, REG_DL, REG_BL, |
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REG_ES, REG_CS, REG_SS, REG_DS, REG_FS, REG_GS, |
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REG_CR0, REG_CR1, REG_CR2, REG_CR3, REG_CR4, REG_CR5, REG_CR6, REG_CR7, |
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REG_DR0, REG_DR1, REG_DR2, REG_DR3, REG_DR4, REG_DR5, REG_DR6, REG_DR7, |
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REG_ST0, REG_ST1, REG_ST2, REG_ST3, REG_ST4, REG_ST5, REG_ST6, REG_ST7, |
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REG_INVALID |
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}; |
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struct DIS_ARGS { |
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enum DIS_ACCESS access; |
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enum DIS_SIZE size; |
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enum X86REGS reg; |
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union { |
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uint8_t b; |
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int8_t rb; |
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uint16_t w; |
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int16_t rw; |
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uint32_t d; |
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int32_t rd; |
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/* uint48_t f; FIXME */ |
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uint64_t q; |
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int64_t rq; |
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struct { |
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enum X86REGS r1; /* scaled */ |
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enum X86REGS r2; /* added */ |
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uint8_t scale; /* r1 multiplier */ |
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int32_t disp; |
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} marg; |
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} arg; |
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}; |
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/* FIXME: pack this thing and make macroes to access it in different compilers */ |
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struct DISASMED { |
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uint16_t table_op; |
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uint16_t real_op; |
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enum DIS_STATE state; |
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uint32_t opsize; |
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uint32_t adsize; |
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uint32_t segment; |
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struct DIS_ARGS args[3]; |
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uint8_t cur; |
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uint8_t padding[40]; /* FIXME: for future versions */ |
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}; |
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#endif |
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