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127 lines
3.1 KiB
127 lines
3.1 KiB
/*-------------------------------------------------------------------------
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*
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* atomics.c
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* Non-Inline parts of the atomics implementation
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*
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* Portions Copyright (c) 2013-2014, PostgreSQL Global Development Group
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*
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*
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* IDENTIFICATION
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* src/backend/port/atomics.c
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*
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*-------------------------------------------------------------------------
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*/
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#include "postgres.h"
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/*
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* We want the functions below to be inline; but if the compiler doesn't
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* support that, fall back on providing them as regular functions. See
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* STATIC_IF_INLINE in c.h.
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*/
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#define ATOMICS_INCLUDE_DEFINITIONS
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#include "port/atomics.h"
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#include "storage/spin.h"
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#ifdef PG_HAVE_MEMORY_BARRIER_EMULATION
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void
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pg_spinlock_barrier(void)
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{
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S_LOCK(&dummy_spinlock);
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S_UNLOCK(&dummy_spinlock);
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}
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#endif
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#ifdef PG_HAVE_ATOMIC_FLAG_SIMULATION
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void
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pg_atomic_init_flag_impl(volatile pg_atomic_flag *ptr)
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{
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StaticAssertStmt(sizeof(ptr->sema) >= sizeof(slock_t),
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"size mismatch of atomic_flag vs slock_t");
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#ifndef HAVE_SPINLOCKS
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/*
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* NB: If we're using semaphore based TAS emulation, be careful to use a
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* separate set of semaphores. Otherwise we'd get in trouble if a atomic
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* var would be manipulated while spinlock is held.
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*/
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s_init_lock_sema((slock_t *) &ptr->sema, true);
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#else
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SpinLockInit((slock_t *) &ptr->sema);
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#endif
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}
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bool
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pg_atomic_test_set_flag_impl(volatile pg_atomic_flag *ptr)
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{
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return TAS((slock_t *) &ptr->sema);
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}
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void
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pg_atomic_clear_flag_impl(volatile pg_atomic_flag *ptr)
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{
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S_UNLOCK((slock_t *) &ptr->sema);
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}
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#endif /* PG_HAVE_ATOMIC_FLAG_SIMULATION */
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#ifdef PG_HAVE_ATOMIC_U32_SIMULATION
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void
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pg_atomic_init_u32_impl(volatile pg_atomic_uint32 *ptr, uint32 val_)
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{
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StaticAssertStmt(sizeof(ptr->sema) >= sizeof(slock_t),
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"size mismatch of atomic_flag vs slock_t");
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/*
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* If we're using semaphore based atomic flags, be careful about nested
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* usage of atomics while a spinlock is held.
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*/
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#ifndef HAVE_SPINLOCKS
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s_init_lock_sema((slock_t *) &ptr->sema, true);
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#else
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SpinLockInit((slock_t *) &ptr->sema);
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#endif
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ptr->value = val_;
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}
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bool
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pg_atomic_compare_exchange_u32_impl(volatile pg_atomic_uint32 *ptr,
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uint32 *expected, uint32 newval)
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{
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bool ret;
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/*
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* Do atomic op under a spinlock. It might look like we could just skip
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* the cmpxchg if the lock isn't available, but that'd just emulate a
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* 'weak' compare and swap. I.e. one that allows spurious failures. Since
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* several algorithms rely on a strong variant and that is efficiently
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* implementable on most major architectures let's emulate it here as
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* well.
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*/
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SpinLockAcquire((slock_t *) &ptr->sema);
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/* perform compare/exchange logic*/
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ret = ptr->value == *expected;
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*expected = ptr->value;
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if (ret)
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ptr->value = newval;
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/* and release lock */
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SpinLockRelease((slock_t *) &ptr->sema);
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return ret;
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}
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uint32
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pg_atomic_fetch_add_u32_impl(volatile pg_atomic_uint32 *ptr, int32 add_)
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{
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uint32 oldval;
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SpinLockAcquire((slock_t *) &ptr->sema);
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oldval = ptr->value;
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ptr->value += add_;
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SpinLockRelease((slock_t *) &ptr->sema);
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return oldval;
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}
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#endif /* PG_HAVE_ATOMIC_U32_SIMULATION */
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