mirror of https://github.com/postgres/postgres
HP-UX hardware is no longer produced, build farm coverage recently ended, and there are no known active maintainers targeting this OS. Since there is a major rewrite of the build system in the pipeline for PostgreSQL 16, and that requires development, testing and maintainance for each OS and tool chain, it seems like a good time to drop support for: * HP-UX, the operating system. * HP aCC, the HP-UX native compiler. Reviewed-by: Tom Lane <tgl@sss.pgh.pa.us> Reviewed-by: Andres Freund <andres@anarazel.de> Reviewed-by: Peter Eisentraut <peter.eisentraut@enterprisedb.com> Discussion: https://postgr.es/m/1415825.1656893299%40sss.pgh.pa.uspull/92/head
Thomas Munro
3 years ago
parent
3c633f32b9
commit
9db300ce6e
@ -1,40 +0,0 @@ |
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/* |
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* tas() for HPPA. |
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* |
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* To generate tas.s using this template: |
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* 1. cc +O2 -S -c tas.c |
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* 2. edit tas.s: |
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* - replace the LDW with LDCWX |
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* 3. install as src/backend/port/tas/hpux_hppa.s. |
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* |
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* For details about the LDCWX instruction, see the "Precision |
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* Architecture and Instruction Reference Manual" (09740-90014 of June |
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* 1987), p. 5-38. |
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*/ |
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int |
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tas(lock) |
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int *lock; /* LDCWX is a word instruction */ |
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{ |
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/* |
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* LDCWX requires that we align the "semaphore" to a 16-byte |
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* boundary. The actual datum is a single word (4 bytes). |
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*/ |
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lock = ((uintptr_t) lock + 15) & ~15; |
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/* |
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* The LDCWX instruction atomically clears the target word and |
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* returns the previous value. Hence, if the instruction returns |
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* 0, someone else has already acquired the lock before we tested |
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* it (i.e., we have failed). |
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* |
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* Notice that this means that we actually clear the word to set |
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* the lock and set the word to clear the lock. This is the |
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* opposite behavior from the SPARC LDSTUB instruction. For some |
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* reason everything that H-P does is rather baroque... |
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*/ |
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if (*lock) { /* this generates the LDW */ |
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return(0); /* success */ |
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} |
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return(1); /* failure */ |
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} |
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@ -1,28 +0,0 @@ |
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.SPACE $TEXT$,SORT=8 |
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.SUBSPA $CODE$,QUAD=0,ALIGN=4,ACCESS=44,CODE_ONLY,SORT=24 |
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tas |
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.PROC |
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.CALLINFO CALLER,FRAME=0,ENTRY_SR=3 |
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.ENTRY |
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LDO 15(%r26),%r31 ;offset 0x0
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DEPI 0,31,4,%r31 ;offset 0x4
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LDCWX 0(0,%r31),%r23 ;offset 0x8
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COMICLR,= 0,%r23,%r0 ;offset 0xc
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DEP,TR %r0,31,32,%r28 ;offset 0x10
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$00000001 |
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LDI 1,%r28 ;offset 0x14
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$L0 |
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.EXIT |
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BV,N %r0(%r2) ;offset 0x18
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.PROCEND ;in=26;out=28;
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.SPACE $TEXT$ |
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.SUBSPA $CODE$ |
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.SPACE $PRIVATE$,SORT=16 |
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.SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31,SORT=16 |
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.SPACE $TEXT$ |
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.SUBSPA $CODE$ |
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.EXPORT tas,ENTRY,PRIV_LEV=3,ARGW0=GR,RTNVAL=GR |
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.END |
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@ -1,106 +0,0 @@ |
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/*-------------------------------------------------------------------------
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* |
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* generic-acc.h |
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* Atomic operations support when using HPs acc on HPUX |
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* |
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* Portions Copyright (c) 1996-2022, PostgreSQL Global Development Group |
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* Portions Copyright (c) 1994, Regents of the University of California |
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* |
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* NOTES: |
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* |
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* Documentation: |
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* * inline assembly for Itanium-based HP-UX: |
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* http://h21007.www2.hp.com/portal/download/files/unprot/Itanium/inline_assem_ERS.pdf
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* * Implementing Spinlocks on the Intel (R) Itanium (R) Architecture and PA-RISC |
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* http://h21007.www2.hp.com/portal/download/files/unprot/itanium/spinlocks.pdf
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* |
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* Itanium only supports a small set of numbers (6, -8, -4, -1, 1, 4, 8, 16) |
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* for atomic add/sub, so we just implement everything but compare_exchange |
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* via the compare_exchange fallbacks in atomics/generic.h. |
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* |
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* src/include/port/atomics/generic-acc.h |
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* |
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* ------------------------------------------------------------------------- |
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*/ |
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#include <machine/sys/inline.h> |
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#define pg_compiler_barrier_impl() _Asm_sched_fence() |
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#if defined(HAVE_ATOMICS) |
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/* IA64 always has 32/64 bit atomics */ |
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#define PG_HAVE_ATOMIC_U32_SUPPORT |
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typedef struct pg_atomic_uint32 |
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{ |
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volatile uint32 value; |
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} pg_atomic_uint32; |
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#define PG_HAVE_ATOMIC_U64_SUPPORT |
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typedef struct pg_atomic_uint64 |
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{ |
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/*
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* Alignment is guaranteed to be 64bit. Search for "Well-behaved |
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* application restrictions" => "Data alignment and data sharing" on HP's |
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* website. Unfortunately the URL doesn't seem to stable enough to |
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* include. |
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*/ |
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volatile uint64 value; |
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} pg_atomic_uint64; |
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#define MINOR_FENCE (_Asm_fence) (_UP_CALL_FENCE | _UP_SYS_FENCE | \ |
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_DOWN_CALL_FENCE | _DOWN_SYS_FENCE ) |
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#define PG_HAVE_ATOMIC_COMPARE_EXCHANGE_U32 |
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static inline bool |
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pg_atomic_compare_exchange_u32_impl(volatile pg_atomic_uint32 *ptr, |
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uint32 *expected, uint32 newval) |
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{ |
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bool ret; |
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uint32 current; |
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_Asm_mov_to_ar(_AREG_CCV, *expected, MINOR_FENCE); |
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/*
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* We want a barrier, not just release/acquire semantics. |
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*/ |
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_Asm_mf(); |
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/*
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* Notes: |
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* _DOWN_MEM_FENCE | _UP_MEM_FENCE prevents reordering by the compiler |
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*/ |
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current = _Asm_cmpxchg(_SZ_W, /* word */ |
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_SEM_REL, |
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&ptr->value, |
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newval, _LDHINT_NONE, |
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_DOWN_MEM_FENCE | _UP_MEM_FENCE); |
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ret = current == *expected; |
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*expected = current; |
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return ret; |
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} |
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#define PG_HAVE_ATOMIC_COMPARE_EXCHANGE_U64 |
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static inline bool |
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pg_atomic_compare_exchange_u64_impl(volatile pg_atomic_uint64 *ptr, |
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uint64 *expected, uint64 newval) |
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{ |
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bool ret; |
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uint64 current; |
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_Asm_mov_to_ar(_AREG_CCV, *expected, MINOR_FENCE); |
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_Asm_mf(); |
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current = _Asm_cmpxchg(_SZ_D, /* doubleword */ |
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_SEM_REL, |
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&ptr->value, |
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newval, _LDHINT_NONE, |
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_DOWN_MEM_FENCE | _UP_MEM_FENCE); |
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ret = current == *expected; |
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*expected = current; |
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return ret; |
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} |
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#undef MINOR_FENCE |
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#endif /* defined(HAVE_ATOMICS) */ |
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@ -1,3 +0,0 @@ |
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/* src/include/port/hpux.h */ |
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/* nothing needed */ |
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@ -1,47 +0,0 @@ |
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# Using X/Open Networking Interfaces requires to link with libxnet.
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# Without specifying this, bind(), getpeername() and so on don't work
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# correctly in the LP64 data model.
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LIBS := -lxnet $(LIBS)
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# Set up rpath so that the executables don't need SHLIB_PATH to be set.
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# (Note: --disable-rpath is a really bad idea on this platform...)
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ifeq ($(with_gnu_ld), yes) |
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rpath = -Wl,-rpath -Wl,'$(rpathdir)'
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else |
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rpath = -Wl,+b -Wl,'$(rpathdir)'
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endif |
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# catch null pointer dereferences
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ifeq ($(with_gnu_ld), yes) |
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# XXX what to put here?
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else |
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LDFLAGS_EX += -Wl,-z
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endif |
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# set up appropriate options for shared library builds
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export_dynamic = -Wl,-E
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INSTALL_SHLIB_OPTS = -m 555
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AROPT = crs
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# env var name to use in place of LD_LIBRARY_PATH
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ld_library_path_var = SHLIB_PATH
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# Rule for building a shared library from a single .o file
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%$(DLSUFFIX): %.o |
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ifeq ($(GCC), yes) |
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ifeq ($(with_gnu_ld), yes)
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$(CC) $(CFLAGS) $< $(LDFLAGS) $(LDFLAGS_SL) -shared -o $@ `$(CC) $(LDFLAGS) -print-libgcc-file-name`
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else
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$(LD) -b -o $@ $< `$(CC) $(LDFLAGS) -print-libgcc-file-name`
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endif
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else |
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ifeq ($(with_gnu_ld), yes)
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$(CC) $(CFLAGS) $< $(LDFLAGS) $(LDFLAGS_SL) -shared -o $@
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else
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$(LD) -b -o $@ $<
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endif
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endif |
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sqlmansect = 5
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@ -1,34 +0,0 @@ |
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# src/template/hpux |
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# Need this for access to many modern library features |
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CPPFLAGS="$CPPFLAGS -D_XOPEN_SOURCE_EXTENDED" |
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# HP's compiler likes the spelling +O2 not -O2, so adjust default CFLAGS |
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if test "$GCC" != yes ; then |
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CFLAGS="+O2" |
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fi |
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# Extra CFLAGS for code that will go into a shared library |
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if test "$GCC" = yes ; then |
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CFLAGS_SL="-fPIC" |
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else |
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CFLAGS_SL="+Z" |
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fi |
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# Pick right test-and-set (TAS) code. We need out-of-line assembler |
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# when not using gcc. |
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case $host in |
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hppa*-*-hpux*) |
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if test "$GCC" != yes ; then |
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need_tas=yes |
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tas_file=hpux_hppa.s |
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fi |
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;; |
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esac |
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case $host_cpu in |
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ia64) |
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DLSUFFIX=".so";; |
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*) |
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DLSUFFIX=".sl";; |
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esac |
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